1. Field of the Invention
The present invention relates to a film carrier tape for mounting electronic components or devices, having a conductor wiring pattern superimposed on an insulating film (for example, TAB (Tape Automated Bonding) tape, T-BGA (Tape Ball Grid Array) tape, CSP (Chip Size Package) tape, ASIC (Application Specific Integrated Circuit) tape, COF (Chip on Film) tape, bimetal (double-sided wiring) tape, multilayer wiring tape or the like) (hereinafter referred to simply as “film carrier tape for mounting electronic components or devices”), and relates to a process for producing the same. More particularly, the present invention relates to an film carrier tape for mounting electronic components or devices, comprising an insulating film having a treated surface and a wiring composed of a seed layer superimposed on the treated surface of the insulating film and an electrodeposited copper foil layer superimposed on a surface of the seedlayer, which film carriertape excels in not only migration resistance but also adhesiveness of wiring to the insulating film, and relates to a process for producing the same.
2. Description of the Prior Art
In the field of electronic industry, use is made of printed wiring boards on which electronic components or devices, such as ICs (integrated circuits) and LSIs (large scale integrated circuits), are mounted. With respect to the current electronic equipment, as typified by, for example, cell-phones, the reduction in size and weight, sophistication, reliability increase, cost reduction, etc. thereof are demanded.
As a method of mounting electronic components or devices which is suitable for realization of characteristics, such as size and weight reduction, of electronic equipment, it is common practice to mount devices on a film carrier tape for mounting electronic components or devices, such as a TAB tape. Such a film carrier tape for mounting electronic components or devices is produced by first adhering a conductive metal foil, such as a copper foil, through a resin adhesive, such as an epoxy, to an insulating film, such as a polyimide; subsequently coating a surface of this conductive metal foil with a photosensitive resin; carrying out exposure and thereafter development so as to obtain a desired wiring pattern; and with the use of exposed or unexposed portions of the resin as a masking member, etching the conductive metal foil to thereby form a wiring.
Heretofore, the use of the thus obtained triple layer flexible substrate consisting of a layer of insulating film, a layer of resin adhesive and a layer of conductive metal has been predominant because generally the process for producing the same is simple so as to enable low-cost production.
However, in accordance with the above-mentioned advance of size and weight reduction of electronic equipment, high-density mounting of electronic components or devices is demanded, and hence with respect to the wiring width of film carrier tape for mounting electronic components or devices, narrow pitch is increasingly demanded. Meeting this demand by means of the above film carrier tape for mounting electronic components or devices of triple layer flexible substrate configuration, such as a TAB tape, is becoming difficult.
Specifically, in the formation of wiring by etching the copper foil layer superimposed on an insulating film in conformity with desired wiring pattern, etching spreading toward the bottom from a photoresist mask would be effected at wiring sides with the result that the formed wiring would be likely to have a sectional configuration of trapezoid spreading toward the bottom. Thus, the wiring pitch width after etching that has been performed until ensuring electrical insulation between wires would be so large that in the use of commonly employed triple layer flexible substrate having a copper foil of, for example, about 35 μm thickness adhered thereto, there have been limits on the realization of narrow pitch of wiring.
An attempt to realize a narrow pitch of wiring by reducing the extent of wiring bottom spreading with the use of a substrate having a thinner copper foil adhered thereto would encounter problems in production technology. For example, it would be difficult to obtain, in the form of a triple layer flexible substrate, a substrate with narrow pitch of wiring whose production would be infeasible unless use is made of a copper foil of, for example, about several microns to ten-odd microns thickness.
Accordingly, in recent years, a double layer flexible substrate having a copper conductor layer directly formed on an insulating film through a procedure of, for example, providing an insulating film with a thin copper electroplating has been developed and brought to practical use.
This double layer flexible substrate is generally produced through a procedure of providing an insulating film with a copper electroplating. For forming an electrodeposited copper foil layer through copper electroplating, it is common practice to perform pretreatments comprising treating a surface of insulating film, for example, roughening the surface by exposure to plasma and thereafter forming a thin undercoating metal layer (seed layer) on the surface. The surface of the seed layer is subjected to copper electroplating.
Specifically, first, a surface of insulating film constituted of, for example, a polyimide is treated with plasma so as to roughen the same according to, for example, known inverse sputtering. A seed layer is formed on the roughened surface by metallizing the same by vapor deposition according to, for example, sputtering. Thereafter, an electrodeposited copper foil layer of about 8 μm thickness is formed on a surface of the seed layer by copper electroplating, thereby obtaining a double layer flexible substrate. As the metal for constituting the seed layer, use is made of, for example, nickel or a nickel base alloy, such as a nickel-copper alloy, a nickel-chromium alloy or a nickel-copper-chromium alloy (see, for example, Published Japanese Translation of PCT Patent Applications from Other States, No. 2000-508265).
This double layer flexible substrate is used as, for example, a COF (Chip on Film) tape, and enables obtaining a wiring of narrow pitch, for example, pitch width of 30 μm.
In the actual use of double layer flexible substrates, as mentioned above, having devices mounted thereon, there has surfaced such a problem that upon application of voltage to copper wiring circuits, the copper would be ionized and slowly dissolved out, resulting in connection of neighboring circuits by the copper, namely, short-circuiting, known as “migration”, thereby becoming a cause of damaging of the reliability of electronic components or devices.
For the reliability test evaluating the degree of this migration, there is commonly employed a method wherein referring to FIG. 6, voltage is applied to wiring pattern 102 of evaluation substrate 100 consisting of an insulating film and, superimposed thereon, comb-shaped wiring pattern 102 for evaluation, followed by measuring of the insulation of pattern circuits. In FIG. 6, among the comb-shaped opposite-arranged 16 wires of pattern circuit 102, 8 wires constitute positive electrodes 104 while the rest of 8 wires constitute negative electrodes 106. With respect to these, the inter-wire pitch width is 50 μm, and the distance between positive electrode wire end 108 and negative electrode wire end 110 is 10 mm. At constant temperature and humidity, for example, 85° C. and 85% RH, voltage of DC 60 V is applied to a circuit consisting of the pattern circuit 102 having a resistor of 100 kΩ connected in series thereto, and the voltage applied to the resistor of 100 kΩ is measured. The insulation resistance of the pattern circuit 102 is calculated from the measurement, and the change of insulation resistance value with time is evaluated.
Now, pattern circuit 102 for evaluation is prepared from a double layer flexible substrate comprising an insulating film and, directly superimposed thereon, a conductor layer and subjected to this migration evaluation test. Specifically, a seed layer of, for example, a nickel-copper alloy is formed on the treated surface of insulating film, and a copper layer is formed on a surface of the seed layer by copper electroplating. Thereafter, resist coating, hardening, exposure and etching are carried out so as to form a comb-shaped pattern. The comb-shaped pattern is treated by electroless tin plating, thereby obtaining pattern circuit 102 for evaluation. Migration evaluation of this pattern circuit 102 is performed under the above-mentioned conditions. In the migration evaluation, for example, at the passage of about 100 to 300 hr, the insulation resistance of the evaluation pattern would markedly drop to result in short-circuiting.
On the other hand, it is demanded for the seed layer to increase the adhesiveness of conductor wiring to insulating film. Thus, a technology for suppressing the above migration without detriment to this adhesiveness is demanded.
The present invention has been made with a view toward solving the above problems of the prior art. Accordingly, it is an object of the present invention to provide a film carrier tape for mounting electronic components or devices that excels in not only migration resistance but also adhesiveness of wiring to insulating film and to provide a process for producing the same.